NOR Gates#
Definition: NOR Gate
A NOR gate is a logic gate which computes the negation of a disjunction:
\[\mathop{\operatorname{NOT}} \circ \mathop{\operatorname{OR}}\]
Notation
The following symbols are used for NOR gates:
Here is the truth table for this gate when \(n = 2\):
| \(A\) | \(B\) | \(\mathop{\operatorname{NOR}}(A, B)\) |
|---|---|---|
| \(0\) | \(0\) | \(1\) |
| \(0\) | \(1\) | \(0\) |
| \(1\) | \(0\) | \(0\) |
| \(1\) | \(1\) | \(0\) |
CMOS Implementation#
Algorithm: NOR Gate via CMOS
A NOR gate with \(n\) inputs is implemented via CMOS as follows:
- Create a top layer of \(n\) PMOS transistors in series.
- Connect the source of the top PMOS to the supply \(V_{\text{DD}}\).
- Connect the gate of the \(i\)-th PMOS to the \(i\)-th input.
- Create a bottom layer of \(n\) NMOS transistors in parallel.
- Connect the source of each NMOS to ground.
- Connect the gate of the \(i\)-th NMOS to the \(i\)-th input.
- Connect the drain of the bottom PMOS to the drain of each NMOS and drive this connection as the output.
Example: 2-Input NOR
