Skip to content

Arithmetic Circuits#

Adders#

Adders are electronic circuit which can perform addition of currents or voltages.

Example: Adder-Subtractor via Op-Amp

An adder can be implemented using specially chosen Ohmic resistors and an ideal op-amp:

Analog Adder-Subtractor

As long as the ideal op-amp is operated in its linear region and the resistors are chosen such that \(\frac{\sum G_k + G_0}{G_0} = \frac{\sum G'_k + G'_0}{G'_0}\), the above circuit behaves like a generalized summing amplifier (or adder-subtractor), producing an output voltage \(v_{\text{out}}\) that is a weighted difference of the input voltages \(v_1, \dotsc, v_n, v_1', \dotsc, v_m'\):

\[ v_{\text{out}} = \sum_{k = 1}^m \frac{G_k'}{G_0} v_k' - \sum_{k = 1}^n \frac{G_k}{G_0}v_k \]

To ensure that the ideal op-amp is indeed operated in its linear region, we need the calculated output voltage to stay within the supply limits, \(v_{\text{out}} \in [-V_{\text{sat}}; +V_{\text{sat}}]\).

We can see this by analyzing the network.

Linear region:

When the ideal op-amp is operated in its linear region, we have \(v_+ = v_-\). We apply Kirchhoff's current law to the input terminals.

At the non-inverting terminal (\(+\)), the sum of currents leaving the node is zero:

\[ \sum_{k=1}^m G'_k (v_+ - v'_k) + G'_0 v_+ = 0 \implies v_+ = \frac{\sum_{k=1}^m G'_k v'_k}{\sum_{k=1}^m G'_k + G'_0} \]

At the inverting terminal (\(-\)), the sum of currents leaving the node is also zero:

\[ \sum_{k=1}^n G_k (v_- - v_k) + G_0 (v_- - v_{\text{out}}) = 0 \implies v_- = \frac{\sum_{k=1}^n G_k v_k + G_0 v_{\text{out}}}{\sum_{k=1}^n G_k + G_0} \]

By equating \(v_{+} = v_{-}\), we have the following:

\[ \frac{\sum_{k=1}^m G'_k v'_k}{\sum_{k=1}^m G'_k + G'_0} = \frac{\sum_{k=1}^n G_k v_k + G_0 v_{\text{out}}}{\sum_{k=1}^n G_k + G_0} \]

Since \(\frac{\sum G_k + G_0}{G_0} = \frac{\sum G'_k + G'_0}{G'_0}\), we arrive at the expression provided in the diagram:

\[ v_{\text{out}} = \sum_{k=1}^m \frac{G'_k}{G'_0} v'_k - \sum_{k=1}^n \frac{G_k}{G_0} v_k \]

Saturation regions:

When the ideal op-amp is operated outside its linear region, the differential voltage \(v_d = v_+ - v_-\) is non-zero. The voltage \(v_+\) is still determined solely by the input divider network:

\[ v_+ = \frac{\sum_{k=1}^m G'_k v'_k}{\sum_{k=1}^m G'_k + G'_0} \]

However, the voltage \(v_-\) depends on the clamped output voltage (\(v_{\text{out}} = \pm V_{\text{sat}}\)):

\[ v_- = \frac{\sum_{k=1}^n G_k v_k + G_0 (\pm V_{\text{sat}})}{\sum_{k=1}^n G_k + G_0} \]

When the ideal op-amp is operated in its negative saturation region, we have \(v_d \lt 0\) and \(v_{\text{out}} = -V_{\text{sat}}\). This implies \(v_+ \lt v_-\), meaning the weighted sum of the inverting inputs dominates the non-inverting inputs.

When the ideal op-amp is operated in its positive saturation region, we have \(v_d \gt 0\) and \(v_{\text{out}} = +V_{\text{sat}}\). This implies \(v_+ \gt v_-\), meaning the weighted sum of the non-inverting inputs dominates.

Multipliers#

Theoretical Model#

Definition: Multiplier

\[ \left\vert\begin{aligned}i_1 = 0 \\ i_2 = 0\end{aligned}\right. \qquad v_3 = \frac{1}{U_M} v_1 v_2 \]

Voltage Multiplier

Dividers#

Theoretical Model#

Definition: Divider

\[\left\vert\begin{aligned}i_1 = 0 \\ i_2 = 0\end{aligned}\right. \qquad v_3 = U_D \frac{v_1}{v_2}\]

Analog Divider